Treatment of Semiconductor Assembly and Test Activities as Manufacturing
March 16, 2006
MEMORANDUM FOR: INDUSTRY DIRECTORS
DIRECTOR, PERFORMANCE, QUALITY AND AUDIT ASSISTANCE
DIRECTOR, FIELD SPECIALISTS
DIRECTOR, PREFILING AND TECHNICAL GUIDANCE
FROM: Barry B. Shott
Acting Industry Director
Communications, Technology, and Media
SUBJECT: Industry Directive -- Treatment of Semiconductor Assembly and Test Activities as Manufacturing
This memorandum is intended to provide direction in order to effectively utilize resources in the examination of semiconductor (“chip”) company assembly and test activities pursuant to rules at Treas. Reg. § 1.954-3(a)(4). This LMSB Directive is not an official pronouncement of the law and cannot be used, cited, or relied upon as such.
In the examination of several cases of semiconductor companies, we have found general uniformity in the fact pattern. There are two basic stages in semiconductor production: front end (fabrication or “fab”) and back end (which includes “assembly and test”). The facts have been that wafers are fabricated in the United States or by a Controlled Foreign Corporation (CFC) in one country and shipped to a different CFC in a different country for performance of “assembly and test” activities.
During the front end process (wafer fabrication), silicon or other materials are prepared and wafers are fabricated and subjected to a number of processing steps to produce multiple copies of an electronic circuit or “die ” 1 on the wafer. This wafer fabrication is indisputably considered to be a manufacturing activity.
During the back end process, after the die are separated and sorted 2 , the following activities are conducted, which are generally known in the semiconductor industry as “assembly and test” activities (hereinafter “semiconductor assembly and test activities”). The good die are put through a series of processes to create the electrical connection(s) necessary for the device to function. Die are attached to a frame, substrate, printed-circuit board, or other material. 3 The completed product is most commonly referred to as a “chip”.
Considerable resources are spent examining semiconductor assembly and test activities, in many cases touring facilities and hiring outside industry experts to determine if these activities constitute manufacturing for Subpart F purposes under IRC § 954(d)(1) and Treas. Reg. § 1.954-3(a)(4). 4
The issue of whether semiconductor assembly and test activities constitute “manufacturing” also arises under the Foreign Sales Corporation (FSC) provisions of IRC § 921-927, specifically § 927(a)(1) and the Regulations thereunder at § 1.927(a)-1T(c) 5 . Treas. Reg. § 1.927(a)-1T(c)(2) states in relevant part that, “property which is sold or leased by a person is considered to be manufactured, produced or processed by that person or by another person pursuant to a contract with that person if the property is manufactured or produced, as defined in § 1.954-3(a)(4).”
Applying the substantive test for “manufacturing” under Treas. Reg. § 1.954-3(a)(4)(iii), semiconductor assembly and test activities, where the facts are generally as described above, have consistently been determined by Exam and hired outside industry experts to be substantial in nature and generally considered to constitute manufacturing. 6
Therefore, absent significant divergence from the facts as generally described above, examiners are directed generally to treat semiconductor assembly and test activities as manufacturing for purposes of Treas. Reg. § 1.954-3(a)(4)(iii). 7 No inference should be drawn as to treatment of activities in any other industry.
Any questions regarding this matter should be directed to High Technology Industry Counsel Michelle Korbas at (510) 637-2616, High Technology Industry Technical Advisor Sherry Larsen at (408) 817-6164, or International Technical Advisor Jim Guidone at (973) 569-4840.
cc: Commissioner, LMSB
Deputy Commissioner, LMSB
Division Counsel, LMSB
Directors, Field Operations
1 Die are also referred to as “integrated circuits”, “ICs”, or “semiconductors”. Depending on size (which varies widely), often more than 1,000 integrated circuits can be obtained from a single wafer. Actual yield depends upon number of defects.
2 One CFC may perform the entire back end process, including die separation and sorting, or it may perform only the “assembly and test” activities. The activities in the back end process that are not performed by the CFC directly will not be attributed to such CFC for purposes of determining whether the activities of such CFC constitute manufacturing for Subpart F purposes under IRC 954(d)(1) and Treas. Reg. § 1.954-3(a)(4).
3 Assembly and test processes may include and / or may be referred to as: die-attach, attaching, bonding, wire-bonding, flip-chip (whereby bumps on the die make the connections), connecting, encapsulating, packaging, sealing, testing, labeling, marking, or other processes, resulting in the final product. Some of these processes are alternatives to others.
4 Treas. Reg. § 1.954-3(a)(4) generally sets forth two alternative facts and circumstances tests: the “substantial transformation” test at (a)(4)(ii); and the “substantial in nature and generally considered manufacturing” test at (a)(4)(iii). Pursuant to Treas. Reg. § 1.954-3(a)(4)(iii), in no event is “minor assembly” considered to be manufacturing.
5 For transactions after September 30, 2000, Extraterritorial Income Exclusion (ETI) provisions at IRC §114 and §§ 941 to 943 apply, specifically § 943(a)(1). In absence of detailed administrative guidance pertaining to ETI, since the ETI principles of “manufacturing” are analogous to the FSC provisions, taxpayers and the Service may apply the FSC Regulations. See S. Rep. No. 106-416, 106th Cong., 2nd Sess. 18 (2000).
6 Some taxpayers have argued for the application of Rev. Rul. 78-228 and TAM 7815004, but they are not controlling.